SAN JOSE, Calif. – January 21, 2010 – Apache Design Solutions, the technology leader in power and noise solutions for chip-package-systems (CPS) convergence, today announced that the company has achieved record bookings and revenue in Q4, while maintaining profitability. In addition, the company had double digit growth from 2008 to 2009 and became the market [...]
Read More
Contract reflects successful integration of Apache and Sequence Design, now delivering complete power and noise solutions from RTL to GDS SAN JOSE, CALIFORNIA – January 20, 2010 – Apache Design Solutions, the technology leader in power and noise solutions for chip-package-systems (CPS) convergence, today announced that Sigma Designs, Inc. (Nasdaq: SIGM), a leader in digital [...]
Read More
Synfora PICO High Level Synthesis Platform Certified in Berkeley Design Technology’s New Tool Certification Program MOUNTAIN VIEW, Calif. – January 18, 2010 – The PICO High Level Synthesis Platform from Synfora, Inc., the premier provider of high level synthesis tools for integrated circuit and system designers, has achieved certification in Berkeley Design Technology, Inc.’s (BDTI’s) [...]
Read More
WINSTON-SALEM, N.C. – January 12, 2010 – Triad Semiconductor Inc., the industry’s leading supplier of via-configurable mixed-signal ASICs, today announced the first system-on-chip (SoC) to integrate the world-class ARM® Cortex™-M0 with the via-configurable analog and digital functions needed to rapidly and inexpensively deliver embedded mixed-signal solutions. Triad’s Mocha-1™ array provides access to ARM standardized 32-bit [...]
Read More
riad Semiconductor Inc., the industry’s leading supplier of via-configurable mixed-signal ASICs, will demonstrate its via-configurable array (VCA) technology, and products implementing the technology, at ArrowFest 2009 in Santa Clara, CA; Mississauga, Ontario, Canada; and Lowell, MA in October.
Read More
Pyxis Technology, Inc., the company innovating software solutions for the physical design and routing of custom and system-on-chip (SoC) integrated circuits (ICs), has received the second tranche of cash from its latest U.S. $3 million funding round.
Read More
Complementary and Integrated Flow Already in Use by Top Tier Customers MOUNTAIN VIEW, Calif. – August 27, 2009 – Synfora, Inc., the premier provider of algorithmic synthesis tools for integrated circuit and system designers of large, complex processing applications, today announced that it has purchased Esterel Studio™, a tool suite developed by Esterel EDA Technologies. [...]
Read More
Azuro, Inc., a provider of advanced implementation tools for nanometer chip design, today announced version 5 of its PowerCentric™ low-power clock tree synthesis (CTS) solution with extended support for complex system-on-chip (SoC) designs.
Read More