SAN JOSE, CALIFORNIA May 20, 2010 – Apache Design Solutions, the technology leader in power integrity and noise closure for chip-package-systems (CPS) convergence, today announced that MoSys, Inc. (NASDAQ: MOSY), a leading provider of differentiated, high-density memory and high-speed interface (I/O) intellectual property (IP), has adopted Apache’s power and noise solutions, including RedHawk for SoC power integrity, Totem for custom IP validation and model generation, Sentinel for package design optimization, and PathFinder for electrostatic discharge (ESD) verification. MoSys is using Apache’s products in both their IP and their SoC businesses, allowing them to supply accurate and high performance models to their customers and deliver quality products to the market on time.

In February 2010, MoSys announced the broadening of its business from designing and delivering high-speed interface IP and high density memory IP to include the Bandwidth Engine™ family of ICs, which will combine MoSys’ patented 1T-SRAM® high-density embedded memory with its ultra high-speed 10 Gbps SerDes interface technology. MoSys uses Totem to perform accurate transistor-level power/ground noise analysis and to create Custom Macro Model (CMM) for SoC integration and validation. CMM enables hierarchical dynamic verification methodology and provides IP protection for delivery. In addition, RedHawk and Sentinel are used for chip-level power integrity, including integrated CMM and package parasitics. At the full-chip level, MoSys uses Apache’s latest product PathFinder, the ESD integrity solution, to ensure the robustness of their chip’s ESD protection mechanisms.

“Approximately one year ago, MoSys acquired Prism Circuits, a provider of world class, high-speed SerDes IP. Given that high-speed I/O interfaces are highly sensitive to power noise, we recognized that the traditional methods of using SPICE with scripts were inadequate,” said Sundari Mitra, executive vice-president of engineering at MoSys. “Using Totem, our team was able to quickly identify, and therefore resolve, real design issue in our SerDes circuit. The adoption of Apache’s products has helped MoSys sustain its leadership in IP and strengthen its competitiveness in the serial chip-to-chip communications markets.”

“MoSys’ patented 1T-SRAM IP is well-known in the industry for its quality,” said Dian Yang, senior vice president and general manager at Apache. “As MoSys broadens its product strategy, I am pleased that our solutions will contribute to their continued delivery of high quality IPs.”

About MoSys, Inc.
MoSys, Inc. (NASDAQ: MOSY) develops serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs. MoSys’ IP portfolio includes DDR3 PHYs and SerDes IP that support data rates from 1 – 11 Gigabits per second (Gbps) across a variety of standards. In addition, MoSys offers its flagship, patented 1T-SRAM(R) and 1T-Flash(R) memory cores, which offer a combination of high-density, low power consumption, high speed and low cost advantages for high-performance networking, computing, storage and consumer/graphics applications. MoSys IP is production-proven in more than 225 million devices. MoSys is headquartered in Sunnyvale, California. More information is available on MoSys’ website at http://www.mosys.com.

About Apache Design Solutions
Apache delivers the industry’s leading global power and noise analyses platform solutions for Chip-Package-System convergence from RTL to sign-off. Apache’s innovative platforms address the unique power and noise challenges associated with specific design domains such as SoC (digital), analog / custom IP, and System (IC package, SiP, PCB) while providing a co-analysis environment that integrates the SoC and system worlds. Apache’s products are adopted by 90% of the top 25 IDM, fabless semiconductor, and foundries for cost reduction, risk mitigation, and time-to-market improvements. Apache is a global company with over 200 employees and R&D centers and direct sales / support offices worldwide.

# # #

Apache Design Solutions, CMM, CPM, CoolTime, Columbus, NSPICE, RedHawk, PakSI-E, PathFinder, PsiWinder, PowerArtist, PowerTheater, Sahara, Sentinel, Totem, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc. All other trademarks mentioned herein are the property of their respective owners.

SAN JOSE, CALIFORNIA – January 20, 2010 – Apache Design Solutions, the technology leader in power and noise solutions for chip-package-systems (CPS) convergence, today announced that Sigma Designs, Inc. (Nasdaq: SIGM), a leader in digital media processing system-on-chip (SoC) solutions for consumer electronics, has adopted Apache’s RTL to sign-off power and noise integrity products. PowerArtist-XP(TM) provides a complete RTL power optimization platform with fully-integrated advanced analysis and automatic reduction. RedHawk(TM) enables full-chip dynamic power analysis from early-stage design to sign-off.

In September 2009, Apache acquired Sequence Design, expanding the company’s product offerings from the earliest stages of RTL design all the way to the physical signoff level. Sigma Designs chose Apache to analyze power as early in the design flow as possible, for maximum impact on cost control and chip power.

“Power is always a concern for our end users. Many of our chips go into systems with little to no cooling capability and battery life is important for portable media,” said Jacques Martinella, Vice President of Engineering at Sigma Design. “We need to keep delivering the same power levels at 40nm designs, even as speeds increase by 50%. Apache’s ability to analyze power early, and show us where power is wasted and where it will peak, was key to our choice of PowerArtist and RedHawk.”

Sigma’s early results from two blocks analyzed during evaluation showed that PowerArtist-XP was able to exactly point to where, when and why power was consumed. Utilizing both the power reduction techniques in the tool and the advanced visual environment, Sigma Designs was able to quickly reduce power. A key capability in PowerArtist-XP identifies critical peak power cycles across multiple simulations for RedHawk dynamic voltage drop analysis, which will help Sigma reduce the risk of peak power-related chip failures.

“Sigma is a leader in high-performance digital media processing SoCs,” said Vic Kulkarni, senior vice president and general manager of the RTL business unit at Apache. “We are pleased to be able to meet their power needs at smaller geometries with Apache’s new range of platforms.”

About Apache Design Solutions
Apache delivers the industry’s leading global power and noise analyses platform solutions for Chip-Package-System convergence. Apache’s innovative platforms address the unique power and noise challenges associated with specific design domains such as SoC (digital), analog / custom IP, and System (IC package, SiP, PCB), while providing a co-analysis environment that integrates the SoC and System worlds. From early-stage to sign-off, Apache’s products are adopted by 95% of the top 20 IDM, fabless semiconductor, and foundries for cost reduction, risk mitigation, and time-to-market improvements. Apache is a global company with over 200 employees and R&D centers and direct sales / support offices worldwide.

# # #

Apache Design Solutions, CMM, CPM, CoolTime, Columbus, NSPICE, RedHawk, PakSI-E, PsiWinder, PowerArtist, PowerTheater, Sahara, Sentinel, Totem, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc. All other trademarks mentioned herein are the property of their respective owners.