power analysis

This tag is associated with 7 posts

Apache’s Totem-SE Named a Finalist in EDN’S 20th Annual Innovations Awards Competition

SAN JOSE, Calif. – March 1, 2010 - Apache Design Solutions, the technology leader in power integrity and noise closure for chip-package-systems (CPS) convergence, today announced that Totem-SE, the industry’s first fully integrated power and noise analysis platform for analog, mixed-signal, memory, and high-speed I/O designs, has been selected from hundreds of nominations to be [...]
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Apache Design Solutions’ Power Analysis and Optimization Solutions Adopted by PLX Technology

RedHawk and PakSi-E deployed as the power analysis, sign-off, and optimization solutions for leading network storage designs SAN JOSE, CALIFORNIA – February 9, 2010 – Apache Design Solutions, the technology leader in power and noise integrity for chip-package-systems (CPS) convergence, today announced that PLX Technology, Inc. (NASDAQ: PLXT) has adopted Apache’s RedHawk-NX and PakSi-E solutions to [...]
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Chip-Package-Systems Convergence Workshop to be Held at DesignCon 2010

Key semiconductor and system design houses to share insights and practical solutions SAN JOSE, CALIFORNIA – January 26, 2009 – Apache Design Solutions, the technology leader in power and noise integrity for chip-package-systems (CPS) convergence, is sponsoring a workshop at DesignCon 2010 to facilitate industry-wide discussion on the challenges, methodologies, and techniques required for chip-package-systems (CPS) [...]
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Apache Design Solutions to Participate at the Electronic Design and Solutions Fair 2010

Key Executive to present at the Low Power Design Session highlighting the latest solutions for low power designs SAN JOSE, CALIFORNIA – January 25, 2010– Apache Design Solutions, the technology leader in power and noise integrity for chip-package-systems (CPS) convergence, today announced that the company will be participating at the upcoming Electronic Design and Solution Fair [...]
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Apache Design Solutions Closes 2009 with Record Quarter and Record Year

SAN JOSE, Calif. – January 21, 2010 – Apache Design Solutions, the technology leader in power and noise solutions for chip-package-systems (CPS) convergence, today announced that the company has achieved record bookings and revenue in Q4, while maintaining profitability. In addition, the company had double digit growth from 2008 to 2009 and became the market [...]
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Apache’s Power and Noise Solutions for Chip-Package-System Convergence Adopted by Sigma Designs for Digital Media SoCs

Contract reflects successful integration of Apache and Sequence Design, now delivering complete power and noise solutions from RTL to GDS SAN JOSE, CALIFORNIA – January 20, 2010 – Apache Design Solutions, the technology leader in power and noise solutions for chip-package-systems (CPS) convergence, today announced that Sigma Designs, Inc. (Nasdaq: SIGM), a leader in digital media [...]
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TSMC Includes Azuro Vectorless Power Analysis and Multi-Corner CTS in Reference Flow 10.0

Azuro, Inc., a provider of software tools for semiconductor chip design, today announced that Taiwan Semiconductor Manufacturing Company (TSMC) has included Azuro’s PowerCentric™ multi-corner CTS and SASim™ vectorless power analysis as part of TSMC’s Reference Flow 10.0.
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