Physical Design
Tanner EDA and IC Mask Design Collaborate on Tools to Accelerate Analog Layout Design
Tanner EDA layout expertise and IC Mask Design’s layout technology to boost design productivity and quality MONROVIA, California – March 2, 2010 – Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs) and IC Mask Design, an industry leader in the provision of physical design [...]Read More
ATopTech’s Aprisa Physical Design Solution Qualified by TSMC for 40nm Designs
Santa Clara, CA – January 19, 2010 — ATopTech, Inc., the primary technology leader in integrated circuit (IC) physical design solutions addressing the challenges of designing ICs at 65 nanometers and below, today announced that Aprisa, the company’s award-winning physical design solution, has been qualified for TSMC’s 40nm technology node, meeting the foundry’s requirements of [...]Read More
Most Emailed
- Apache Design Solutions Introduces Totem, the Industry’s First Power and Noise Integrity Platform for Analog and Mixed-Signal Designs - 1 email
- Of investors, bloggers and customers - 1 email
- What’s that Noise? - 1 email
- ATopTech Introduces Industry’s First Top-Level Design Tool to Seamlessly Integrate All Hierarchical Functions with Block-Level Implementation - 1 email
- EDA 2010: The Year of “Less is More” - 1 email
© 2010 TechGuri. 