Inc.
Azuro Strengthens Leadership in High Performance Clock Tree Synthesis
New release of PowerCentric™ delivers 15% reductions in clock insertion delays and full support for CPF 1.1 SANTA CLARA, CA – June 14, 2010 – Azuro, Inc., the provider of advanced clock and timing optimization tools for digital chip design, today announced version 5.2 of PowerCentric™, the company’s industry-leading clock tree synthesis tool. This release [...]Read More
Azuro Strengthens Leadership in Timing Optimization
New release of Rubix™ delivers 15% increase in clock frequency and full support for CPF 1.1 SANTA CLARA, CA – June 14, 2010 – Azuro, Inc., the provider of advanced clock and timing optimization tools for digital chip design, today announced version 1.4 of Rubix™, the company’s industry-leading clock concurrent optimization tool. This release deploys [...]Read More
Apache Design Solutions Chosen by Major CPU/GPU/APU Semiconductor Design Company as Global Supplier for Power Noise and Reliability Sign-off Tools
Apache’s complete product offering enables next generation of computing and graphics designs SAN JOSE, CALIFORNIA - June 14, 2010 – Apache Design Solutions, the technology leader in power integrity, noise closure, and reliability sign-off for chip-package-systems (CPS), today announced that Advanced Micro Devices, Inc. (NYSE: AMD), the only company who delivers both x86 microprocessors and [...]Read More
ATopTech Introduces Industry’s First Top-Level Design Tool to Seamlessly Integrate All Hierarchical Functions with Block-Level Implementation
ATopTech, Inc., the primary technology leader in integrated circuit (IC) physical design solutions addressing the challenges of designing ICs at 65 nanometers and below, today announced the Apogee hierarchical physical design solution, which is the first in the industry to seamlessly integrate all the critical hierarchical design functions with a market-leading block-level implementation tool in a single environment.Read More
Oasys Design System Signs WorldWide OEM Agreement to Integrate Concept Engineering’s NlView Visualization Engine
Concept Engineering today announced that Oasys Design Systems, Inc., developer of the RealTime Designer full-chip physical register transfer-level (RTL) synthesis product, has signed a worldwide OEM license for Concept Engineering′s Nlview™ visualization engineRead More
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