Apache’s Totem-SE Named a Finalist in EDN’S 20th Annual Innovations Awards Competition

SAN JOSE, Calif. – March 1, 2010 - Apache Design Solutions, the technology leader in power integrity and noise closure for chip-package-systems (CPS) convergence, today announced that Totem-SE, the industry’s first fully integrated power and noise analysis platform for analog, mixed-signal, memory, and high-speed I/O designs, has been selected from hundreds of nominations to be [...]
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Nominations Being Accepted for 11th Annual Women in Electronic Design Automation Achievement Award

Nominating Period Open through March 5, 2010 LOUISVILLE, Colo. – Feb. 3, 2010 – The 47th Design Automation Conference (DAC), the premier conference devoted to electronic design and design automation (EDA), today announced that nominations for the Marie R. Pistilli Women in EDA Achievement Award are now being accepted. Nominations must be received no later than [...]
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47th Design Automation Conference Submission Deadline for User Track Technical Presentations Extended

LOUISVILLE, Colo. –– January 14, 2010 –– The 47th Design Automation Conference (DAC), the premier conference devoted to electronic design and design automation (EDA), will once again provide a forum with user-focused technical presentations in 2010. IC designers, application engineers, design flow developers, and vendor-customer teams are invited to submit two-page abstracts describing the real-life [...]
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Radiation Hardened Structured ASIC Workshop Attendees Tape Out Multiple Designs in Four Days

ViASIC, Micro-RDC and AFRL give each participant free prototype chips of their designs RESEARCH TRIANGLE PARK, N.C. – December 9, 2009 - ViASIC Inc., a leading electronic design automation company that offers IP and services for reconfigurable semiconductor fabrics, today announced the results of the recently held Workshop on Radiation Hardened Structured ASIC design instantiation. The [...]
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Myth # 8 : Crosstalk aware timing fixing can be done in post-route stage only.

One of the most convincing stories you can hear from any big EDA marketing person is that crosstalk is something which can only show up after the routes are laid down and thus needs to be fixed as a post-process step after routing.
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Apache Design Solutions Acquires Sequence Design - Acquisition Expands Company’s Technology Leadership in Power and Noise Solutions to RTL Designs

Apache Design Solutions, the technology leader in power and noise integrity for Chip-Package-Systems (CPS) convergence, today announced it has acquired the assets, including intellectual property, and foreign subsidiaries of Sequence Design, the EDA leader in RTL Design for Power (DFP)™ solution.
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TSMC Includes Azuro Vectorless Power Analysis and Multi-Corner CTS in Reference Flow 10.0

Azuro, Inc., a provider of software tools for semiconductor chip design, today announced that Taiwan Semiconductor Manufacturing Company (TSMC) has included Azuro’s PowerCentric™ multi-corner CTS and SASim™ vectorless power analysis as part of TSMC’s Reference Flow 10.0.
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Azuro Announces Record Sales in the First Half of 2009

Azuro, Inc., a provider of advanced implementation tools for nanometer chip design, today announced record sales and revenue for the first six months of 2009.
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DAC 2009 - San Francisco - Free Exhibit Passes

DAC is two weeks away and if you have not yet registered for the EDA show of the year, now is the time. Atrenta, Denali and Springsoft have a great offer, they will be sponsoring 600 FREE DAC exhibit hall passes this year – See for more info visit: http://www.deepchip.com/wiretap/090709.html With all the exciting new products [...]
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