Bhavana Thudi
Bhavana is currently a Manager of Strategic Initiatives at Apache Design Solutions working on power and noise analysis initiatives. She has over 6 years of experience in the EDA industry with a key focus on die, system, and cross-domain analysis and optimization. Bhavana's areas of expertise include power noise issues such as IR-drop, EM, ESD, EMI, jitter, SSO, etc. and chip-system convergence. Bhavana holds a Master of Science degree in Electrical Engineering from University of Michigan, Ann Arbor and is currently pursuing MBA from Haas School of Business.
Practical Methodologies for Power / Signal Integrity of Chip-Package-Board Designs – A Industry Focused Workshop at DesignCon 2010
Is there a disconnect in your die, package and board design methodology? As technologies evolve to meet demands of higher performance, smaller size and lower cost, there are several challenges in the design of chips, packages and boards which must be addressed with an integrated analysis and verification methodology. For example, maintaining power integrity means [...]
Chip Power Model for Co-design
The advancement of silicon technology and packaging, PCB technology does not happen in isolation. There is a great deal of interdependence between the IC and the interconnect world that drives technological innovation – for example, the rapid scaling of silicon and the need for high speed transmission is followed by higher performance, lower cost packages. [...]
Welcome to my nook!
Welcome to my blog – a place for us to share experiences and talk about applications that will help make better semiconductor chips and systems. In the coming months, I will talk about IC-Package-System co-design; about melding the different chip and system worlds to achieve true design, analysis and verification closure. I look forward to [...]
Most Emailed
- Apache Design Solutions Introduces Totem, the Industry’s First Power and Noise Integrity Platform for Analog and Mixed-Signal Designs - 1 email
- Of investors, bloggers and customers - 1 email
- What’s that Noise? - 1 email
- ATopTech Introduces Industry’s First Top-Level Design Tool to Seamlessly Integrate All Hierarchical Functions with Block-Level Implementation - 1 email
- EDA 2010: The Year of “Less is More” - 1 email
