Aveek Sarkar
Aveek is currently the Vice President of Product Engineering and Support at Apache Design Solutions. Since joining in 2003 as a senior applications engineer, Aveek has taken on various roles and responsibilities at Apache including a Director of Product Engineering. Prior to Apache, he worked for Sun Microsystems on several generations of UltraSparc processors. Aveek holds a Master of Science in Electrical Engineering from Oregon State University, B.Tech from Indian Institute of Technology, Kanpur, and a MBA from Santa Clara University.
3D IC design power delivery network analysis challenges
3D die stacking using through silicon vias (TSVs) is an emerging technology with considerable promise in reducing the area, performance and power limitations of transmitting signals between multiple dies. It provides the flexibility of connecting chips performing different functions (memory, processor, power management) and fabricated using different processes inside the same package in a [...]
Live from DAC User Track … Power Analysis and IP Reuse
The DAC User Track is a new forum this year in DAC with lot of interesting topics. I happen to be in one of them today so wanted to share my learning from this session.
Nadeem Eleyan from Qualcomm presented a method on estimating toggle rates in their custom designs using ESP-CV instead of full Spice [...]
Mobility chips, I/O circuits, SiP designs and getting ready for DAC.
Hope everyone had a great July 4th weekend. We are now three weeks away from DAC and before we know it we will be at Moscone Center. As we get ready for the conference, I wanted to share some information.
We are fortunate to have three key customers present in our booth. Harpreet Anand from Broadcom’s [...]
Musings from a recent trip…
Last week I was visiting our customers in various locations in Israel. In many ways this trip was important. We had just announced Totem™, our full-chip transistor level power noise and reliability analysis solution which many of our users in Israel have been using for some time. We were seeing increased acceptance of our co-design [...]
Hello everyone!
Hello everyone and welcome to my blog!
I will use this space to share my experiences working here at Apache in bringing technologies that help our customers make their designs more likely to succeed the first time around and at the lowest unit cost looking at chip design holistically considering the package it goes in [...]
Most Emailed
- Apache Design Solutions Introduces Totem, the Industry’s First Power and Noise Integrity Platform for Analog and Mixed-Signal Designs - 1 email
- Of investors, bloggers and customers - 1 email
- What’s that Noise? - 1 email
- ATopTech Introduces Industry’s First Top-Level Design Tool to Seamlessly Integrate All Hierarchical Functions with Block-Level Implementation - 1 email
- EDA 2010: The Year of “Less is More” - 1 email
