Key semiconductor and system design houses to share insights and practical solutions

SAN JOSE, CALIFORNIA – January 26, 2009 – Apache Design Solutions, the technology leader in power and noise integrity for chip-package-systems (CPS) convergence, is sponsoring a workshop at DesignCon 2010 to facilitate industry-wide discussion on the challenges, methodologies, and techniques required for chip-package-systems (CPS) convergence. The workshop, entitled “Practical Methodologies for Power/Signal Integrity of Chip-Package-Board Designs,” will be held from 9am to noon on Thursday, February 4th in the Santa Clara Convention Center.

As technologies evolve to meet performance, area, and cost demands, designers are faced with several challenges that are becoming increasingly critical to the success of IC and system designs. To address these chip-package-board challenges requires integrated analysis and verification solutions but there is a lack of tools and methodologies available in the industry today.

In this workshop, representatives from key semiconductor and system design companies will come together to discuss their understanding of power and signal integrity challenges across the global system. They will share their insights on techniques and practical methods the industry is using to address the CPS requirements and what vendors can do to develop and deliver solutions that meet their needs. The workshop will drive an open forum for semiconductor and system companies to exchange ideas and information that will help define the contents of future technologies for chip and package modeling and system level verification for power and signal integrity.

As Larry Smith, signal and power integrity architect from Altera Corporation, says, “PDN design and performance is a system-level problem involving the die, package, and PCB. The industry is in need of tools and concepts to address this challenging issue. We appreciate Apache taking the initiative to drive and facilitate this forum for discussion at DesignCon.”

“The Practical Methodologies for Power/Signal Integrity of Chip-Package-Board Designs workshop in this year’s program is representative of the overall objective of the DesignCon event, which spans the electronic design disciplines from the chip through boards and systems,” commented DesignCon program director Barry Sullivan. “We look forward to the unique take each participant will share with the DesignCon audience next month.”

For additional detail, or to listen to a podcast preview, please go to
http://www.designcon.com/2010/attendees/th_th1/index.asp

Apache Design is offering a free Exhibits PLUS pass to DesignCon (which allows entry to the exhibition, keynote addresses, technical panels, business forum sessions, and more) to workshop attendees. For more information, see http://www.apache-da.com/apache-da/Home/NewsandEvents/Events.html

About Apache Design Solutions
Apache delivers the industry’s leading global power and noise analyses platform solutions for Chip-Package-System convergence. Apache’s innovative platforms address the unique power and noise challenges associated with specific design domains such as SoC (digital), analog / custom IP, and System (IC package, SiP, PCB), while providing a co-analysis environment that integrates the SoC and System worlds. From early-stage to sign-off, Apache’s products are adopted by 95% of the top 20 IDM, fabless semiconductor, and foundries for cost reduction, risk mitigation, and time-to-market improvements. Apache is a global company with over 200 employees and R&D centers and direct sales / support offices worldwide.

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